IMAPS 2009 San Jose - Review

IMAPS 2009 in San Jose was, as expected, slow due to current economic conditions. It was evident that reduced travel budgets and last minute exhibitor cancellations left several booths empty, amplifying the lack of normal show noise in exhibit hall! However, the old saying rings true in this context: "when times are bad, traffic is slow...but the important people always show up".

imaps 2009 san jose  

Quality over Quantity 

imaps logo

With the above-stated aside, IMAPS 2009 was no different from any other year. At the Palomar Technologies booth, we experienced slower than usual foot traffic but exceptionally high quality prospects. One could argue that this year IMAPS show was better than most because the decision makers came out. The desired result of any trade show exhibitor, if given the choice, is quality over quantity. Its probably safe to say that the exhibitors who showed up could say the same about their traffic.

Scientific Papers and Presentations 

A highlight of the show were the technological papers given. Palomar's Sr. Scientist Daniel D. Evans Jr. presented a paper titled "Micron Level Placement Accuracy for Wafer Scale Packaging of P-Side Down Lasers in Optoelectronic Products" (I will have the paper posted on this link next week; or for an advanced copy contact us and we'll make sure you get it). This paper focused on applications requiring ultra high placement accuracies of 1um to 3 um. We knew Dan's paper was a success when several attendees stopped in at the Palomar booth to say how impressed they were; these complements garnered further interest in Palomar's Model 6500 Ultra High Accuracy Die Bonder and its capabilities.  

Myself, Steve Buerki from Palomar, partnered with Amanda Hartnett from Indium Corporation in presenting "Process Reliability Advantages of AuSn Eutectic Die Attach". This paper focused on applications for high-power semiconductor devices mounted using Gold Tin (AuSn) eutectic solder. Gold Tin solder is a robust die-attach material that can handle the temperature fluctuations generated by the microchip (die) and mechanical stresses due to CTE mismatches between the die material, and the substrate it is mounted to. This presentation was also well received and was by a long shot the largest attended presentation of the show.  

- Steve Buerki